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Architectural synthesis for VLSI neural networks

Title:

Architectural synthesis for VLSI neural networks

Torbey, Elie (1992) Architectural synthesis for VLSI neural networks. Masters thesis, Concordia University.

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Abstract

Presents a synthesis methodology for the automated design of single and multi-chip processors implementing neural networks.

Divisions:Concordia University > Faculty of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (Masters)
Authors:Torbey, Elie
Pagination:xiv, 132 leaves ; ill. ; 29 cm.
Institution:Concordia University
Degree Name:Theses (M.A.Sc.)
Program:Electrical and Computer Engineering
Date:1992
Thesis Supervisor(s):Haroun, B. S
ID Code:2546
Deposited By:Concordia University Libraries
Deposited On:27 Aug 2009 15:18
Last Modified:08 Dec 2010 10:27
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