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Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing

Title:

Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing

Chalasani, Raghu Prasad (1994) Parallel network optimization on a shared memory multiprocessor and application in VLSI layout compaction and wire balancing. PhD thesis, Concordia University.

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Abstract

Discusses the design and implementation of 3 parallel algorithms: one algorithm for the transshipment problem, and 2 algorithms for the dual transshipment problem. Also considers an application of these algorithms in solving VLSI layout compaction and wire balancing problems.

Divisions:Concordia University > Faculty of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (PhD)
Authors:Chalasani, Raghu Prasad
Pagination:xii, 223 leaves : ill. ; 29 cm.
Institution:Concordia University
Degree Name:Theses (Ph.D.)
Program:Electrical and Computer Engineering
Date:1994
Thesis Supervisor(s):Thulasiraman, K
ID Code:3860
Deposited By:Concordia University Libraries
Deposited On:27 Aug 2009 15:33
Last Modified:08 Dec 2010 10:35
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