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Distributed point-of-use power supply architectures for low-voltage semiconductor circuits


Distributed point-of-use power supply architectures for low-voltage semiconductor circuits

Xi, Youhao (2003) Distributed point-of-use power supply architectures for low-voltage semiconductor circuits. PhD thesis, Concordia University.

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The low-voltage semiconductor circuit boards in advanced telecom systems require the power supplies to have some key features such as the very low voltage, very high current, very high slew-rate load transients, high power density and low cost. The objective of this thesis is to find solutions to satisfy these requirements without sacrificing the cost, efficiency and usable on-board space. In order to achieve this objective, this thesis proposes two distributed point-of-use power supply architectures (DPUPS) suitable for different configurations of the low-voltage semiconductor circuit boards. In order to implement the proposed DPUPS architectures, this thesis presents two improved soft switching forward converter topologies (Type 1 and Type 2). These two topologies both employ the simplified power transformers that achieve self-reset without using the conventional resetting winding, and they both guarantee the soft switching under all operating conditions without complicating the control scheme. Based on the two improved soft-switching converter topologies, two DPUPS architectures are developed. Both architectures have common merits such as the soft switching, single stage power conversion, minimized length of the high current PCB tracks and reduced PCB copper area, independent and tight voltage regulation at the point of load, instantaneous response to the system dc bus variations, elimination of the cross regulation between multiple outputs, inherent protection against overloading or the output short-circuit condition, capable of high closed-loop bandwidth, and reduced number of power components for multiple output applications. In comparison between these two DPUPS architectures, the one that is implemented with the proposed Type 1 topology is optimal for a circuit board with the heavy current loads collocating, while the other one that is implemented with the Type 2 topology serves better for a circuit board with the heavy current loads distributed at different points. In this thesis, detailed steady state and small signal analyses are performed, the performance of the proposed architectures are characterized, and the design procedures are generated. Simulation and experimental results obtained from prototype circuits are used to verify the analyses and design and to serve as the proof of concepts. The results indicate that the proposed DPUPS architectures provide promising solutions to satisfy the power requirements of the low-voltage semiconductor circuits.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (PhD)
Authors:Xi, Youhao
Pagination:xxiv, 268 leaves : ill. ; 29 cm.
Institution:Concordia University
Degree Name:Ph. D.
Program:Electrical and Computer Engineering
Thesis Supervisor(s):Jain, Praveen K
ID Code:2293
Deposited By: Concordia University Library
Deposited On:27 Aug 2009 17:27
Last Modified:18 Jan 2018 17:18
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