The exponential growth in Internet traffic is partially an outcome of increasing
social networking, cloud computing and the arrival of a variety of applications, for example,
video streaming. Accordingly, it necessitates the deployment of robust data centers
providing data transport at sufficiently high speed. By 2020, 77% of global data networking
stays within data centers and the data traffic between data centers is about 9%
reported by the Cisco Global Index 2014-2019. Short reach optical interconnects in the
data centers satisfy the demand for transfer of such an increasing volume of data. In the
year 2017, the ratio of optical to copper cabling in the data center has reached 60%.
The firrst stage in an optical receiver is a transimpedance amplifier (TIA) which
converts a small photocurrent into a voltage signal. Considering the thermal noise of
the optical receiver as the dominant source of noise, improving the sensitivity of the
optical receiver will lessen the transmitted optical power to establish a given bit error
rate (BER). In a conventional TIA, the realizable gain declines as the data rate is pushed
higher, requiring additional stages of main amplifiers and leading to a power-hungry receiver.
Recently, high-gain but limited bandwidth front ends are proposed to achieve a
high data rate with better noise performance and reduced power dissipation compared to
conventional approaches. However, the reduced bandwidth introduces significant intersymbol
interference (ISI). Discrete time feedforward equalization (DT-FFE) can cancel
ISI. Nevertheless, charge injection and clock feedthrough in the sampling circuit can degrade
the signal. Certain problems associated with discrete time approach is eliminated
in proposed design employing a continuous time FFE (CT-FFE).
The signal-to-noise ratio (SNR) at the output of TIA determines the sensitivity
of the front-end optical receiver. Modeling both the TIA and its thermal noise, by
the second-order response, the eye height and the root mean square (RMS) of the TIA
thermal noise are investigated against the typical characteristics of the model. The root
mean square (RMS) is formulated independently from the data rate. Consequently, the
conditions for which SNR reaches the highest value are extracted. Afterward, a case
study has been done for the shunt-feedback TIA using the above expressions to extract
TIA design parameters with and without an equalizer. The gaol is to reduce the power
consumption by increasing the sensitivity of the TIA. To this end, the above analyses
assist us to replace a conventional TIA following by the power-hungry stages of amplifiers
by a low-bandwidth TIA following with an equalizer.
The proposed CT-FFE is designed in CMOS 65 nm technology. The power dissipation
for the receive and decision circuit is about 13.15 mW from a 1-V supply. The
front-end has an equivalent gain of 66dB. It has an input referred noise of 0.32 uArms,
leading to an estimated noise-limited sensitivity of 4.48 uAp-p in the presence of a
pad/photodiode capacitance of 100 fF.