The fast-growing demand for computational capacity has led to the emergence of large-scale systems where the parallel processing capabilities of many-core processors have made them an ideal solution to bridge the gap between the onboard processing throughput and the applications’ increasing complexity. A many-core processor on a chip can enhance the overall performance without the need for higher clock frequencies and the associated cooling problems at a lower design cost and a smaller system footprint. These features have made the many-core processors an interesting platform to implement complex algorithms. The scaling of space applications from single-core to many-core processors is constrained by the estimation of the vulnerability of many-core COTS’ reliability in the presence of radiation. Recent academic and industrial research efforts have focused on evaluating the reliability of many-core processors against radiation events in order to facilitate their integration in an avionic domain. The radiation environment is characterized by a high-energy particle that ionizes the processor's components causing potential system failure.  

This work presents a scalable fault injection and SEU impact categorization tool. The proposed engine performs simulation-based fault injections at the register transfer level (RTL) level of the design. The injection campaigns insert bit-flips in the general-purpose registers as well as the instruction memory of the different cores in the target processor. The approach enables a fully automated analysis of the SEU effects early in the design time. The soft error propagation through the many-core components is also evaluated to determine the potential impact on the memory elements of the multiple cores. This framework has been applied to evaluate the resilience of the open-source many-core processor OpenPiton.