Login | Register

A Study of Novel Fabrication Techniques for Development of 3-D Silicon Nano-structure Array


A Study of Novel Fabrication Techniques for Development of 3-D Silicon Nano-structure Array

Yaghootkar, Bahareh (2014) A Study of Novel Fabrication Techniques for Development of 3-D Silicon Nano-structure Array. PhD thesis, Concordia University.

[thumbnail of Yaghootkar_PhD_F2014.pdf]
Text (application/pdf)
Yaghootkar_PhD_F2014.pdf - Accepted Version
Available under License Spectrum Terms of Access.


The large surface area and high aspect ratio of nano-structures make them promising candidates as a fundamental building block for manufacturing various devices. The potential applications of silicon nano-structure array include, but are not limited to, electron emitters, sensors, solar cells, rechargeable batteries, and hydrogen storage devices. With advances in nanotechnology, various techniques have been reported for synthesis and fabrication of nano-structures. However, these techniques like chemical vapor deposition and vapor liquid solid suffer from the need of very sophisticated and high cost equipment. Furthermore, the need of high operating temperature, high vacuum, and catalyst material such as gold are major challenges of these techniques. On the other hand some fabrication techniques such as top-down approaches involve complicated fabrication steps that ultimately increase the cost of the device.
Therefore, a rising impetus has been devoted to development of less complicated and low-cost fabrication techniques of silicon nano-structure.
The goal of this thesis was to introduce novel and cost-effective fabrication methods which also maintain the benefits of CMOS compatibility. Two non-lithography top-down approaches were introduced for fabrication of silicon nano-structures array with capability of controlling the structure characteristics.
The first fabrication approach consists of three steps: 1) patterning of silicon surface in TMAH using anisotropic etching technique, 2) formation of porous layer on patterned silicon surface using electrochemical anodic etching, and 3) treatment of porous silicon layer using an alkaline etching to reveal the silicon nano-structure array.
The second fabrication approach consisted of two steps, namely: Anisotropic etching followed by electrochemical etching. The main idea behind this approach was that unlike the first approach the electrochemical etching is performed in transition regime not porous silicon formation regime.
These techniques allowed for the controlling the characteristics and morphology of silicon nano-structures.
Completely different morphologies of nanostructures were achieved as a result of transforming the electrochemical process from porous silicon formation to transition regime.
A study on effect of type of dopant, p- and n-type, on over-mentioned fabrication methods was also investigated.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (PhD)
Authors:Yaghootkar, Bahareh
Institution:Concordia University
Degree Name:Ph. D.
Program:Electrical and Computer Engineering
Thesis Supervisor(s):Kahrizi, Mojtaba
ID Code:978826
Deposited On:26 Nov 2014 13:44
Last Modified:18 Jan 2018 17:47
All items in Spectrum are protected by copyright, with all rights reserved. The use of items is governed by Spectrum's terms of access.

Repository Staff Only: item control page

Downloads per month over past year

Research related to the current document (at the CORE website)
- Research related to the current document (at the CORE website)
Back to top Back to top