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Design of Reconfigurable On-Chip Optical Architectures based on Phase Change Material


Design of Reconfigurable On-Chip Optical Architectures based on Phase Change Material

Zolfaghari, Parya (2022) Design of Reconfigurable On-Chip Optical Architectures based on Phase Change Material. Masters thesis, Concordia University.

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Integrated optics is a promising technology to take the advantage of light propagation for high throughput chip-scale computing architectures and interconnects. Optical devices call for reconfigurable architectures to maximize resource utilization. Typical reconfigurable optical computing architectures involve micro-ring resonators for electro-optic modulation. However, such devices require voltage and thermal tuning to compensate for fabrication process variability and thermal sensitivity. To tackle this challenge we propose to use non-volatile Phase Change Material (PCM) to configure optical path. The non-volatility of PCM elements allows maintaining the optical path without consuming energy and the high contrast between two state of crystalline (cr) and amorphous (am) allows to route signal only through the required resonators, thus saving the calibration energy of bypassed resonators. We evaluate the efficiency of PCM based design on Reconfigurable Directed Logic (RDL) and nanophotonic interconnect. We develop a model allowing to estimate optical and electrical energy consumption. In the context of nanophotonic interconnect we evaluate the efficiency of the proposed PCM-based interconnects using system level simulations carried out with SNIPER manycore simulator. Results show that the proposed implementation allows reducing the static power by 53% on average for RDL and communication power saving up to 52% is achieved for nanophotonic interconnect.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (Masters)
Authors:Zolfaghari, Parya
Institution:Concordia University
Degree Name:M.A. Sc.
Program:Electrical and Computer Engineering
Date:10 October 2022
Thesis Supervisor(s):Le Beux, Sebastien
Keywords:Nanophotonic architectures, Phase Change Material, Design space exploration
ID Code:991297
Deposited By: parya zolfaghari
Deposited On:21 Jun 2023 14:41
Last Modified:21 Jun 2023 14:41


[1] M. JR. Heck, J. F. Bauters, M. L. Davenport, D. T. Spencer, and J. E. Bowers. Ultra-low Loss Waveguide Platform and its Integration with Silicon Photonics. Laser & Photonics Reviews, 8(5):667–686, 2014.
[2] W. Bogaerts, P. D. Heyn, T. V. Vaerenbergh, K. DeVos, S. K. Selvaraja, T. Claes, P. Dumon, P. Bienstman, D.V. Thourhout and Roel Baets. Silicon microring resonators. Laser & Photonics Reviews, 6(1), 47–73, 2012
[3] F. Xia, L. Sekaric, and Y. Vlasov, Nature Photonics 1(1), 65–71 ,2007.
[4] S. Werner, J. Navaridas & M. Luján, A Survey on Optical Network-on-Chip Architectures, ACM Computing Surveys, 50, 1-37, 2017
[5] J. Teng, P. Dumon, W. Bogaerts, H. Zhang, X. Jian, X. Han, M. Zhao, G. Morthier, and R. Baets, Opt. Express 17(17), 14627–14633, 2009
[6] D. Taillaert, W. Van Paepegem, J. Vlekken, and R. Baets, in: Proc. SPIE, 6619, 661914, 2007
[7] L. Zhang, R. Ji, Y. Tian, L. Yang, P. Zhou, Y. Lu, W. Zhu, Y. Liu, L. Jia, Q. Fang and M. Yu, Simultaneous implementation of XOR and XNOR operations using a directed logic circuit based on two microring resonators. Optics express, 19, 6524-40, 2011
[8] C. Qiu, W. Gao, R. Soref, J. Robinson, and Q. Xu, Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators, Opt. Lett. 39, 6767-6770, 2014.
[9] Z. Li, S. Beux, C. Monat, X. Letartre, I. O’Connor, Optical Look Up Table, 2013
[10] I. Chakraborty, G. Saha, A. Sengupta, et al. Toward Fast Neural Computing using All-Photonic Phase Change Spiking Neurons, Sci Rep, 8, 12980, 2018.
[11] P. Xu, J. Zheng, J. Doylend, A. Majumdar, Low-Loss and Broadband Nonvolatile Phase-Change Directional Coupler Switches, ACS Photonics ,6(2), 553 - 557, 2019.
[12] T. Ishihara, A. Shinya, K. Inoue, K. Nozaki, and M. Notomi. An Integrated Optical Parallel Adder as a First Step Towards Light Speed Data Processing. In International SoC Design Conference. IEEE, 123–124, 2016.
[13] Y. Imai, T. Ishihara, H. Onodera, A. Shinya, S. Kita, K. Nozaki, K. Takata, and M. Notomi. An Optical Parallel Multiplier using Nanophotonic Analog Adders and Optoelectronic Analog-to-Digital Converters. In Conference on Lasers and Electro-Optics: Science and Innovations, pages JW2A–50. Optical Society of America, 2018.
[14] D. Perez, I. Gasulla, L. Crudgington, D. Thomson, A. Khokhar, K. Li, W. Cao, G. ovich, J. Capmany, Multipurpose silicon photonics signal processor core, Nature Communications. 8, 2017.
[15] T. Ishihara, J. Shiomi, N. Hattori, Y. Masuda, A. Shinya and M. Notomi, An Optical Neural Network Architecture based on Highly Parallelized WDM-Multiplier-Accumulator, IEEE/ACM Workshop on Photonics-Optics Technology Oriented Networking, Information and Computing Systems (PHOTONICS), pp. 15-21, 2019
[16] Y. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. Zhao, H. Larochelle, D. Englund, and M. Solja£i¢, Deep learning with coherent nanophotonic circuits, Nature Photon., 11(7), 441_446, 2017.
[17] K. V. Kumar, R. Rajasekar, N. Ayyanar and G. T. Raja, Photonic Crystal Mach-Zehnder Optical Switch Based on Phase Change Material, IEEE 20th International Conference on Nanotechnology (IEEE-NANO), 378-381, 2020.
[18] A.Narayan et al., PROWAVES: Proactive Runtime Wavelength Selection for Energy-efficient Photonic NoCs, IEEE TCAD, 2020
[19] H. T. Chen, J. Verbist, P. Verheyen, P. De Heyn, G. Lepage, J. De Coster, P. Absil, X. Yin, J. Bauwelinck, J. Van Campenhout, et al. High Sensitivity 10Gb/s Si Photonic Receiver Based on a Low-Voltage Waveguide-Coupled Ge Avalanche Photodetector. Optics Express, 23(2), 815–822, 2015.
[20] L. Chen, K. Preston, S. Manipatruni, and M. Lipson. Integrated GHz Silicon Photonic Interconnect with Micrometer-Scale Modulators and Detectors. Optics Express, 17(17), 15248–15256, 2009.
[21] C. Gunn. CMOS Photonics for High-Speed Interconnects. IEEE Micro,26(2), 58–66, 2006.
[22] Ian O’Connor and Gabriela Nicolescu. Integrated Optical Interconnect Architectures for Embedded Systems, Springer Science & Business Media, 2012.
[23] Yu-Hsiang Kao and H. Jonathan Chao, a bufferless photonic clos network-on-chip architecture. In Fifth ACM/IEEE International Symposium on Networks on Chip (NoCS’11). IEEE, 81–88, 2011
[24] P. Ambs, A short history of optical computing: Rise, decline, and evolution. Proceedings of SPIE - The International Society for Optical Engineering, 7388, 2009.
[25] J. Touch, A.H. Badawy, V. Sorger, Optical computing. Nanophotonics, 6, 2017
[26] X. Chen et al., The Emergence of Silicon Photonics as a Flexible Technology Platform, in Proceedings of the IEEE, 106(12), pp. 2101-2116, Dec. 2018,
[27] T. Ishihara, A. Shinya, K. Inoue, K. Nozaki and M. Notomi, An integrated optical parallel adder as a first step towards light speed data processing, International SoC Design Conference (ISOCC), Jeju, Korea, 123-124, 2016.
[28] J. Shiomi, T. Ishihara, H. Onodera, A. Shinya and M. Notomi, An Integrated Optical Parallel Multiplier Exploiting Approximate Binary Logarithms Towards Light Speed Data Processing, IEEE International Conference on Rebooting Computing (ICRC), McLean, VA, USA, 1-6, 2018
[29] Y. Tian, L. Zhang, and L. Yang, Electro-optic directed AND/NAND logic circuit based on two parallel microring resonators, Opt. Express 20, 16794-16800, 2012.
[30] L. Zhang, J. Ding, Y. Tian, R. Ji, L. Yang, H. Chen, P. Zhou, Y. Lu, W. Zhu, and R. Min, Electro-optic directed logic circuit based on microring resonators for XOR/XNOR operations, Opt. Express 20, 11605-11614, 2012.
[31] C.Condrat, P. Kalla, S. Blair. Logic synthesis for integrated optics. GLSVLSI '11, 2011.
[32] R. Wille, O. Keszocze, C. Hopfmuller and R. Drechsler, Reverse BDD-based synthesis for splitter-free optical circuits, The 20th Asia and South Pacific Design Automation Conference, 172-177, 2015.
[33] Z. Zhao, Z. Wang, Z. Ying, S. Dhar, R. T. Chen, and D. Z. Pan, Logic Synthesis for Energy-Efficient Photonic Integrated Circuits, In Design Automation Conference, 22th Asia and South Paci_c. IEEE, 2018.
[34] X. Sui, Q. Wu, J. Liu, Q. Chen and G. Gu, A Review of Optical Neural Networks, in IEEE Access, 8, pp. 70773-70783, 2020
[35] X. Y. Xu, M. X. Tan, B. Corcoran, J. Y. Wu, A. Boes, T. G. Nguyen, S. T. Chu, B. E. Little, D. G. Hicks, R. Morandotti, A. Mitchell, and D. J. Moss, 11 TOPS photonic convolutional accelerator for optical neural networks, Nature, 589, 44-51, 2021
[36] A. N. Tait, T. F. de Lima, E. Zhou, A. X.Wu, M. A. Nahmias, B. J. Shastri, and P. R. Prucnal, Neuromorphic photonic networks using silicon photonic weight banks, Sci. Rep., 7(1), 2017
[37] Y. Shen, N. C. Harris, S. Skirlo, M. Prabhu, T. Baehr-Jones, M. Hochberg, X. Sun, S. Zhao, H. Larochelle, D. Englund, and M. Solja£i¢, Deep learning with coherent nanophotonic circuits, Nature Photon., 11(7), 441_446, 2017.
[38] J. Feldmann, N. Youngblood, C. D. Wright, H. Bhaskaran, and W. H. P. Pernice, All-optical spiking neurosynaptic networks with self-learning capabilities, Nature, 569(7755), 208-214, 2019.
[39] A. Vajda, Multi-core and Many-core Processor Architectures, In Book Programming Many-Core Chips, 2011.
[40] R. Ho, K.W. Mai, and M. Horowitz, The Future of Wires, In Proceedings of the IEEE, 89(4), 2001.
[41] W. Bogaerts, S. K. Selvaraja, H. Yu, and et al., A Silicon Photonics Platform with Heterogeneous III-V Integration, In Proceedings of Integrated Photonics Research, Silicon and Nano-Photonics, 2011.
[42] C. A. Brackett, Dense wavelength division multiplexing networks: principles and applications, In IEEE Journal on Selected Areas in Communications, 8(6), pp. 948-964, 1990.
[43] D. Vantrease, N. Binkert, R. Schreiber and M. H. Lipasti, Light speed arbitration and flow control for nanophotonic interconnects, 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 304-315, 2009.
[44] C. Li, M. Browning, P.V. Gratz, and S. Palermo, LumiNOC: A power-efficient, high performance, photonic network-on-chip. IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems, 33(6), 826–838, 2014.
[45] L. Ramini, P. Grani, S. Bartolini, and D. Bertozzi, fcontrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis. In Proceedings of the Conference on Design, Automation and Test in Europe. EDA Consortium, 1589–1594, 2013.
[46] H. Li, A. Fourmigue, S. Le Beux, I. O'Connor and G. Nicolescu, Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning, in IEEE Transactions on Emerging Topics in Computing, 6(3), 343-356, 2018.
[47] Y. Pan, P. Kumar, J. Kim, G. Memik, Y. Zhang, A. Choudhary, Firefly: Illuminating Future Network-on-Chip with Nanophotonics, ACM SIGARCH Computer Architecture News, 37(3), 429–440, 2009.
[48] X. Chen, J. Feng, J. Xu, J. Zhang and S. Chen, Simultaneously Tolerate Thermal and Process Variations Through Indirect Feedback Tuning for Silicon Photonic Networks, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(7), 1409-1422, 2021,
[49] D. Dang, R. Mahapatra and E. J. Kim, PID controlled thermal management in photonic network-on-chip, 33rd IEEE International Conference on Computer Design (ICCD), 17-23, 2015.
[50] M. Kim, M.H. Kim, Y. Jo, H.K. Kim, S. Lischke, C. Mai, L. Zimmermann, W.Y. Choi, A Silicon Electronic-Photonic Integrated 25-Gb/s Ring Modulator Transmitter with a Built-in Temperature Controller. Photonics Research. 9, 2021.
[51] F. P. Sunny, A. Mirza, I. Thakkar, M. Nikdast and S. Pasricha, ARXON: A Framework for Approximate Communication Over Photonic Networks-on-Chip, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 29(6), 1206-1219, 2021.
[52] J. Lee, C. Killian, S. L. Beux, D. Chillet, Distance-aware Approximate Nanophotonic Interconnect, ACM Transactions on Design Automation of Electronic Systems, 27(2), 1-30, 2021.
[53] X. Wu et al., SUOR: Sectioned Undirectional Optical Ring for Chip Multiprocessor, JETC, 10, 1–25, 2014
[54] E. Fusella, A. Cilardo, Crosstalk-Aware Automated Mapping for Optical Networks-on-Chip, ACM Transactions on Embedded Computing Systems. 16, 1-26, 2016.
[55] S. Le Beux et al., Chameleon: Channel efficient Optical Network-on-Chip, Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1-6, 2014.
[56] S. Abdollahramezani, O. Hemmatyar, H. Taghinejad, A. Krasnok, Y. Kiarashinejad, M. Zandehshahvar, A. Alù, A. Adibi, Tunable nanophotonics enabled by chalcogenide phase-change material, Nanophotonics, 9(5), 1189-1241, 2020.
[57] J. Zheng, A. Khanolkar, P. Xu, S. Colburn, S. Deshmukh, J. Myers, J. Frantz, E. Pop, J. Hendrickson, J. Doylend, N. Boechler, and A. Majumdar, GST-on-silicon hybrid nanophotonic integrated circuits: a non-volatile quasi-continuously reprogrammable platform, Opt. Mater. Express 8, 1551-1561, 2018.
[58] M. Rudé, J. Pello, R. E. Simpson, et al., Optical switching at 1.55 μ m in silicon racetrack resonators using phase change materials, Appl. Phys. Lett., 103(14), 141119, 2013.
[59] M. Stegmaier, C. Ríos, H. Bhaskaran, C. D. Wright, and W. H. Pernice, Nonvolatile all-optical 1×2 switch for chipscale photonic networks, Adv. Opt. Mater., 5(1), 1600346, 2017.
[60] C. Wu, H. Yu, H. Li, X. Zhang, I. Takeuchi, and M. Li, Low-loss integrated photonic switch using subwavelength patterned phase change material, ACS Photonics, 6(1), pp. 87–92, 2018.
[61] D. Tanaka, Y. Shoji, M. Kuwahara, et al., Ultra-small, selfholding, optical gate switch using Ge2Sb2Te5 with a multimode Si waveguide, Optics Express, 20(9), pp. 10283–10294, 2012.
[62] M. Stegmaier, C. Rıos, H. Bhaskaran, and W. H. Pernice, Thermo-optical effect in phase-change nanophotonics, ACS Photonics, 3(5), 828–835, 2016.
[63] C.K. Kato, M. Kuwahara, H. Kawashima, T. Tsuruoka, and H. Tsuda, Current-driven phase-change optical gate switch using indium–tin-oxide heater, Appl. Phys. Express, 10(7), 072201, 2017.
[64] J. Zheng, S. Zhu, P. Xu, S. Dunham, and A. Majumdar, Modeling electrical switching of nonvolatile phase-change integrated nanophotonic structures with graphene heaters, ACS Appl. Mater. Interfaces, 12(19), 2020.
[65] P. Xu, J. Zheng, J. Doylend, A. Majumdar, Low-Loss and Broadband Nonvolatile Phase-Change Directional Coupler Switches, ACS Photonics ,6(2), 553 - 557, 2019.
[66] C. Rios, P. Hosseini, C. D. Wright, H. Bhaskaran, and W. H. Pernice, On-chip photonic memory elements employing phase-change materials, Adv. Mater., 26(9), 1372–1377, 2014.
[67] W. H. Pernice and H. Bhaskaran, Photonic non-volatile memories using phase change materials, Appl. Phys. Lett., 101(17), 171101, 2012.
[68] C. Ríos, M. Stegmaier, P. Hosseini, et al. Integrated all-photonic non-volatile multi-level memory, Nature Photon 9, 725–732, 2015.
[69] J. Feldmann, M. Stegmaier, N. Gruhler, et al., Calculating with light using a chip-scale all-optical abacus, Nat. Commun., 8(1), p. 1256, 2017.
[70] C. Ríos, N. Youngblood, Z. Cheng, et al., In-memory computing on a photonic platform, Sci. Adv., 5(2), 5759, 2019.
[71] J. Feldmann, N. Youngblood, C. Wright, H. Bhaskaran, and W. Pernice, All-optical spiking neurosynaptic networks with selflearning capabilities, Nature, 569(7755), 208, 2019.
[72] Z. Zhao, Z. Wang, Z. Ying, et al. Logic synthesis for energy-efficient photonic integrated circuits, 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 355-360, 2018.
[73] N. Yamada et al., Rapid, phase transitions of GeTe-Sb2Te3 pseudobinary amorphous thin films for an optical disk memory. Journal Applied Physics, 1991.
[74] M. Bahadori et al., Crosstalk penalty in microring-based silicon photonic interconnect systems, J. Lightwave Technol., 2016
[75] C. Sun et al., DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling, IEEE/ACM Sixth International Symposium on Networks-on-Chip, Lyngby, Denmark, pp. 201-210, 2012.
[76] J. Lee et al., Approximate nanophotonic interconnects. IEEE/ACM NOCS, 2019.
[77] Goswami, Debabrata. (2003). Optical computing. Resonance. 8. 56-71
[78] P. Vivet et al., IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management, IEEE Journal of Solid-State Circuits, 2021
[79] A.H. Atabaki, S. Moazeni, F. Pavanello, et al. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip, Nature 556, pp. 349–354, 2018.
[80] S. Xu, J. Wang, R. Wang, J. Chen, and W. Zou, High-accuracy optical convolution unit architecture for convolutional neural networks by cascaded acousto-optical modulator arrays, Opt. Express 27, 19778-19787, 2019.
[81] R. A. Minasian, Photonic signal processing of microwave signals, IEEE Transactions on Microwave Theory and Techniques, 54(2), pp. 832-846, 2006.
[82] Z. Zhao, Z. Wang, Z. Ying, S. Dhar, R. T. Chen and D. Z. Pan, Optical computing on silicon-on-insulator-based photonic integrated circuits, IEEE 12th International Conference on ASIC (ASICON), Guiyang, China, pp. 472-475, 2017.
[83] Z. Ying, Z. Wang, Z. Zhao, S. Dhar, D. Pan, R. Soref, and R. Chen, Silicon microdisk-based full adders for optical computing, Opt. Lett. 43, 983-986 , 2018.
[84] Beausoleil, Ray, et al. A nanophotonic interconnect for high-performance many-core computation, Integrated Photonics and Nanophotonics Research and Applications. Optical Society of America, 2008
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