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Integrating Abstraction Techniques for Formal Verification of Analog Designs

Title:

Integrating Abstraction Techniques for Formal Verification of Analog Designs

Zaki, Mohamed H., Denman, William, Tahar, Sofiène and Bois, Guy (2009) Integrating Abstraction Techniques for Formal Verification of Analog Designs. Journal of Aerospace Computing, Information, and Communication, 6 (5). pp. 373-392. ISSN 1542-9423

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Official URL: http://dx.doi.org/10.2514/1.44289

Abstract

The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical
behaviours. In this paper, we propose a qualitative based predicate abstraction method for the verification of a class
of non-linear analog circuits. In the proposed method, system equations are automatically extracted from a circuit
diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and
computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive
simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver,
SMV and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples
including Colpitts and tunnel diode oscillators.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Article
Refereed:Yes
Authors:Zaki, Mohamed H. and Denman, William and Tahar, Sofiène and Bois, Guy
Journal or Publication:Journal of Aerospace Computing, Information, and Communication
Date:2009
Digital Object Identifier (DOI):10.2514/1.44289
ID Code:977367
Deposited By: DANIELLE DENNIE
Deposited On:14 Jun 2013 14:18
Last Modified:18 Jan 2018 17:44
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