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Power and Noise Configurable Phase-Locked Loop Using Multi-Oscillator Feedback Alignment


Power and Noise Configurable Phase-Locked Loop Using Multi-Oscillator Feedback Alignment

Williams, Christopher (2013) Power and Noise Configurable Phase-Locked Loop Using Multi-Oscillator Feedback Alignment. Masters thesis, Concordia University.

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On-the-fly data rate changes allow for the data rate to be lowered when peak speeds are not needed. A PLL is presented that contains a plurality of sub-VCOs, each able to be enabled or disabled. The goal of this technique is having the power dissipation proportional to the data rate, in order to obtain a fixed energy per transmitted bit. The proposed architecture accomplishes data rate changes by quickly reconfiguring itself and exploiting known power / jitter trade offs in circuit design. The proposed architecture can be applied to either electrical or optical serial links that do not contain a forwarded clock.

By relaxing the jitter constraints at lower data rates, the receiver can enter a low-power mode enabling energy savings when maximum data rates are not required. A bank of sub-VCOs is introduced and can be brought up to speed and connected. An activation procedure and compensation methods have also been introduced in order to avoid arbitrary phases during start-up, which would lead to large phase excursions. Simulations show that by enabling the high-performance mode, data rates of 25 Gb/s are able to be obtained in a CDR setting. In the low power mode, the jitter increases by 1.5 times but the power reduces by 46%. In this mode, the architecture can support data rates of 12.5 Gb/s. Therefore, this system responds to the need of improving energy efficiency in receivers by allowing a dynamic reconfiguration of the circuit; varying power in response to jitter specifications.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (Masters)
Authors:Williams, Christopher
Institution:Concordia University
Degree Name:M.A. Sc.
Program:Electrical and Computer Engineering
Date:30 August 2013
Thesis Supervisor(s):Cowan, Glenn and Liboiron-Ladouceur, Odile
Keywords:Multi-oscillator, Power configurable VCO, Noise configurable VCO, On-the-fly data rate changes
ID Code:977748
Deposited On:18 Nov 2013 16:59
Last Modified:18 Jan 2018 17:45


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