Abstract

Model order reduction has been introduced as a method for reducing the simulation time of large-scale systems in the area of systems and control theory. It substantially reduces the size and complexity of their dynamical models while retaining their main input-output behavior. The application of this method to reduce the expensive simulation and verification time of analog circuits was not straightforward and is still facing many accuracy, robustness and automation challenges, especially for nonlinear analog circuits. A collection of model order reduction methods suitable for linear circuits exists and is used by industry. Unfortunately, these methods cannot be applied directly to nonlinear analog circuits because of the major differences in their dynamical behaviors and high sensitivity to parameter and signal variations. While a linear relationship between the inputs and outputs always exists in linear circuits, small variations in nonlinear circuits inputs or parameters from their nominal values can lead to large output variations. In order to enhance the robustness and accuracy of this class of methods, in this thesis, we propose a framework for the behavioral verification of nonlinear analog circuits based on fuzzy theory, model order reduction, and fast statistical simulation methods. For this purpose, we first provide a modeling environment based on modified nodal analysis and curve-fitting, where analog circuit differential models are automatically generated using SPICE netlists and simulation traces. The uncertainties about the initial conditions, the parameters and the inputs are incorporated in their differential models as fuzzy numbers. Then, the obtained fuzzy differential models are solved using a qualitative simulation method that characterizes their behavior and provides a means to describe their behavioral properties. We compute envelopes enclosing the complete circuit trajectories in response to the introduced fuzziness in the state space. The obtained fuzzy state space evolution is employed to preset the parameters of the model order reduction method. Then, we use different techniques such as state space clustering, linearization, and Krylov space projections within an iterative process that ends with the satisfaction of a set of conformance criteria which guarantee the efficiency of the reduced model in terms of accuracy and speed-up. Moreover, we describe the application of this method, in a hierarchical way, to optimize the model order reduction effort for circuits with repeating structures. Furthermore, we employ the proposed model order reduction method to speed-up statistical simulation by reducing the size of all the models which are usually simulated in a Monte Carlo context. In this method, we generate a reduced model and simulate it once to approximate the result of a large number of simulations and approximate their statistical behavior. The application of the thesis work on various large analog circuits proves the effectiveness of our proposed approaches.