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Development of a Secure Lossless Model for Image Steganography and its Hardware Realization for Real-Time Applications


Development of a Secure Lossless Model for Image Steganography and its Hardware Realization for Real-Time Applications

Harb, Salah (2023) Development of a Secure Lossless Model for Image Steganography and its Hardware Realization for Real-Time Applications. PhD thesis, Concordia University.

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Image steganography is a promising security technology through which secret data is securely embedded in an image and then retrieved at the receiver upon receipt of the resulting image. The secret data is concealed in the cover image in a way such that it is invisible, and the resulting stego image is transmitted to an authorized receiver. The receiver has a key that enables extraction of the secret data from the stego image through a technique called recovery process. The design of a good image steganographic scheme aims at achieving three desirable characteristics: high embedding rate, imperceptibility of the secret data in the stego image, and robustness against attacks. Imperceptibility refers to the ability to maintain the quality of the cover image in the generated stego image after embedding the secret data. Embedding rate refers to the amount of secret data that is embedded in a single pixel of the stego image. Robustness against attacks refers to the ability to resist noise that could affect the stego image or steganalysis, ensuring that unauthorized receivers are not able to recover secret data. Existing image steganographic schemes lack providing both high embedding rate and high-quality stego image simultaneously as these are two mutually conflicting requirements. Moreover, robustness against attacks in these schemes is achieved using a high-complexity cryptographic algorithm that increases the time complexity of the image steganography scheme.

In this thesis, our objective is to design and implement a secure and lossless model for image steganography that has the three desirable features mentioned above. To achieve this objective, in the first part of the thesis (Chapters 3 and 4), we develop two novel modulus-based image steganographic algorithms that combine the benefits of two fundamental modulus-based schemes, namely, EMD and DE, resulting in the embedding rate and the quality of the stego image that are superior to that of the individual schemes. In the first algorithm proposed, the two embedding schemes are combined to embed a block of the secret data, whereas in the second algorithm proposed, each block of the secret data is first divided into two parts and then the first part is concealed by using one scheme and the second part by using the other scheme. To enhance the robustness of the proposed algorithms, the pixels of the cover image are first permuted using a low-complexity permutation mechanism prior to the concealment of the secret data. In the second part of the thesis (Chapters 5 and 6), hardware realizations of the two steganographic schemes developed in the first part of the thesis are provided using a reconfigurable platform.

In the third part of the thesis (Chapter 7), a secure lossless image steganographic model, consisting of the modules for encryption, embedding, and recovery, is presented, and a scheme for its efficient hardware implementation is proposed. To this end, first efficient hardware realizations for the encryption and recovery modules are developed. In the encryption module, secret data is made more secure by encrypting it using the hardware implementation of the private-key advanced encryption standard cryptosystem. In the recovery module, the quality of the cover image is preserved by encrypting the modified pixels and their original values using a hardware implementation of the public-key elliptic curve and Paillier cryptosystems. The hardware realizations of these two modules and that of the embedding module, designed in the second part of the thesis, are finally integrated together on an AMD Xilinx Zynq-7000 all programmable SoC platform. The efficiency and usefulness of the hardware implementation of the proposed steganographic model is demonstrated by considering the task of reducing the storage requirement for image data.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (PhD)
Authors:Harb, Salah
Institution:Concordia University
Degree Name:Ph. D.
Program:Electrical and Computer Engineering
Date:28 August 2023
Thesis Supervisor(s):Ahmad, M. Omair and Swamy, M.N.S.
ID Code:992745
Deposited By: SALAH HARB
Deposited On:15 Nov 2023 15:29
Last Modified:15 Nov 2023 15:29
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