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The Digital Design and Synthesis of Delay Doppler Maps in GNSS Remote Sensing Receivers


The Digital Design and Synthesis of Delay Doppler Maps in GNSS Remote Sensing Receivers

Franco, Giovanna (2013) The Digital Design and Synthesis of Delay Doppler Maps in GNSS Remote Sensing Receivers. Masters thesis, Concordia University.

Text (application/pdf)
Franco_MaSC_S2014.pdf - Accepted Version


Global Navigation Satellite Systems (GNSS) are satellite based systems primarily capable of determining the location of receivers on the Earth. However, these systems can also receive and process bistatically surface reflected signals, studying the scattering from the signal off the reflection surface. In order to achieve these results, accurate and fast technology are necessary. In this work, a Delay-Doppler mapping module of a GNSS system has been implemented in VHDL and synthesized on FPGA Xilinx-Virtex 6 to map the delay and frequency domains of Earth scattered signals. The designed system presents high timing
performance to provide quick and accurate measurements. In this work, a FFT based GNSS mapping algorithms has been designed to process raw samples GNSS data. The remote sensing module has been implemented, generating all the 32 possible C/A codes and then processing the received signal for each of the 32 C/A codes in a pipelined circuit. Once the GNSS power signals have been detected, a final detector is used to compare all the GNSS power signals found with a magnitude twice the noise and with the highest peak to detect the best candidate signal for the Delay Doppler Map (DDM). Different timing delay ranges and Doppler frequency ranges have been considered to compare the performance of the mapping algorithm. The use of an FPGA based algorithm permits significantly higher performance and greater flexibility than software based solutions and opens up the GNSS remote sensing application for integration into real-time instruments.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (Masters)
Authors:Franco, Giovanna
Institution:Concordia University
Degree Name:M.A. Sc.
Program:Electrical and Computer Engineering
Date:3 September 2013
Thesis Supervisor(s):Gleason, S.T.
ID Code:977706
Deposited On:16 Jun 2014 18:53
Last Modified:18 Jan 2018 17:45
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