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Fast all-digital carrier synchronization techniques for linear modulation formats


Fast all-digital carrier synchronization techniques for linear modulation formats

Caouras, Nestor (2000) Fast all-digital carrier synchronization techniques for linear modulation formats. Masters thesis, Concordia University.

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This thesis studies fast, independent, low complexity, all-digital data-aided (DA) feedforward (FF) and decision-directed (DD) feedback (FB) carrier recovery (CR) techniques based on oversampling, suitable for linear modulation schemes ( M -ary phaseshift-keying ( M -PSK) and M -ary quadrature amplitude modulation ( M -QAM)). Carrier synchronization is studied because, in passband communications, carrier phase and frequency offsets, due to modem oscillator discrepancies and distances between the users, corrupt the received data and must be removed for proper data decisions. The proposed techniques are evaluated in an additive white Gaussian noise (AWGN), non-multipath, point-to-multipoint burst-mode system. Oversampling of a short preamble is introduced to reduce the required overhead for the FF techniques while still maintaining low hardware complexity, modularity, and a minimal number of different system clocks. The DA FF phase estimation technique is unbiased and shown to perform as well as an equivalent efficient single-sample-per-symbol estimator achieving the Cramér-Rao lower bound (CRLB). The bit-error-rate (BER) degradation agrees with the redicted one with, at most, an extra 0.1 dB loss for a practical implementation in field programmable gate array (FPGA) technology. The autocorrelation-based DA FF frequency estimator, although unbiased, does not achieve the CRLB for large window sizes. Nonetheless, it is able to produce coarse estimates with low hardware resource utilization. Increasing the correlation distance can produce at least a decade improvement in the variance. The DD FB algorithm studied is an all-digital phase-locked loop (APDLL). When oversampled, it performs just as well as an equivalent analog phase-locked loop (PLL) relative to BER degradation, variance, and transfer function characteristic. The ADPLL is stable and displays a wide tracking range, up to half of the sampling rate.

Divisions:Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering
Item Type:Thesis (Masters)
Authors:Caouras, Nestor
Pagination:xvii, 120 leaves : ill. ; 29 cm.
Institution:Concordia University
Degree Name:M.A. Sc.
Program:Electrical and Computer Engineering
Thesis Supervisor(s):Le-Ngoc, Tho
Identification Number:TK 5103.7 C37 2000
ID Code:1048
Deposited By: Concordia University Library
Deposited On:27 Aug 2009 17:16
Last Modified:13 Jul 2020 19:48
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