Abstract

Forward Error Correction (FEC) technique provides a method to detect and correct errors in transmitted data. It is also a valuable technique to reduce the power requirement, thus have an important role in these systems. This reduction in power requirement is achieved at the expense of an increase in bandwidth requirement. The objective is usually to find error control techniques that give good tradeoff between power and bandwidth requirements. In this thesis, we present results for FEC technique using Turbo Block Codes and Turbo Product Codes. It is shown that these codes, not only in theory but also in hardware implementation, are capable of providing significant performance gains over other error-correction schemes. This thesis investigates Trellis based iterative decoding techniques applied to concatenated coding schemes, Turbo Block Codes. We use RM( n, k ) to construct 2-D and multi-dimensional Turbo Block Codes. Our objective is to get high code rates and long block sizes for more bandwidth efficiency and improving the performance of the optimised maximum a posterior decoding algorithm