Abstract

A fuzzy logic approach for module selection and process allocation of fully static DSP data flow graphs (DFG) onto multiprocessor systems is proposed. Fuzzy rule base systems are used to minimize the area and maximize the utilization of the processors within the constraint of a specified latency. The proposed technique provides the designer with more flexibility to explore the design space by using different types of processor modules for the same task. Both heterogeneous and general-purpose processor units are used during the resource allocation process. It is shown that in most cases, moving from a fully homogenous to a fully heterogeneous architecture results in decreasing the design area. However, a hybrid multiprocessor architecture brings about a trade off between the area and the resource sharing. In this thesis, the impreciseness in the system components is taken into account by representing the computational time as a fuzzy set and efficiently constructing rate-optimal schedule using fuzzy arithmetic. (Abstract shortened by UMI.)