Abstract

Functional Verification is considered to be a major bottleneck in the hardware design cycle. One of the challenges faced is to automate the verification cycle itself. Several attempts have been made to automate the verification cycle using Artificial Intelligence (AI) approaches. On the other hand, coverage based verification is an essential part of functional verification where the objective is to generate test vectors that maximize the functional coverage of a design. It uses a random test generator that can be directed by some AI algorithms. This process of adapting AI to direct the test generator according to coverage is called Coverage Directed Test Generation (CDG). CDG is a manual and exhausting process, but it is vital to complete the verification cycle. To increase the coverage, a Cell-based Genetic Algorithm (CGA) is developed to automate CDG. We propose a new approach of using CGA with random number generators based on different probability distribution functions such as Normal (Gaussian) distribution, Exponential distribution, Gamma distribution, Beta distribution and Triangle distribution. We apply the new approach on a 16{604}16 packet switch modeled in SystemC, where we define appropriately several static and temporal coverage points and study the effect of the probability distribution on the coverage rate using CGA as an optimization tool. Furthermore, we model the same 16{604}16 packet switch using Verilog and express the same coverage points using SystemVerilog and run the simulation using Verilog simulator and random number generator based on Normal distribution, Exponential distribution and Uniform distribution to show their effect on coverage and compare the results with our approach. Then experiments show that some probability distributions have more effect on the coverage than other distributions.