Cui, Aijiao, Chang, Chip-Hong, Tahar, Sofiène and Abdel-Hamid, Amr T. (2011) A Robust FSM Watermarking Scheme for IP Protection of Sequential Circuit Design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30 (5). pp. 678-690. ISSN 0278-0070
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Official URL: http://dx.doi.org/10.1109/TCAD.2010.2098131
Abstract
Finite state machines (FSMs) are the backbone of sequential circuit design. In this paper, a new FSM watermarking scheme is proposed by making the authorship information a non-redundant property of the FSM. To overcome the vulnerability to state removal attack and minimize the design overhead, the watermark bits are seamlessly interwoven into the outputs of the existing and free transitions of state transition graph (STG). Unlike other transition-based STG watermarking, pseudo input variables have been reduced and made functionally indiscernible by the notion of reserved free literal. The assignment of reserved literals is exploited to minimize the overhead of watermarking and make the watermarked FSM fallible upon removal of any pseudo input variable. A direct and convenient detection scheme is also proposed to allow the watermark on the FSM to be publicly detectable. Experimental results on the watermarked circuits from the ISCAS'89 and IWLS'93 benchmark sets show lower or acceptably low overheads with higher tamper resilience and stronger authorship proof in comparison with related watermarking schemes for sequential functions.
| Divisions: | Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering |
|---|---|
| Item Type: | Article |
| Refereed: | Yes |
| Authors: | Cui, Aijiao and Chang, Chip-Hong and Tahar, Sofiène and Abdel-Hamid, Amr T. |
| Journal or Publication: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| Date: | 2011 |
| Digital Object Identifier (DOI): | 10.1109/TCAD.2010.2098131 |
| Keywords: | Finite state machine (FSM) IP watermarking intellectual property (IP) protection sequential design state transition graph (STG) |
| ID Code: | 977362 |
| Deposited By: | Danielle Dennie |
| Deposited On: | 14 Jun 2013 13:56 |
| Last Modified: | 18 Jan 2018 17:44 |
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