Ma, Yunlong (2019) SdcNet: A Computation-Efficient CNN for Object Recognition. Masters thesis, Concordia University.
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Abstract
In many computer-vision systems, object recognition is one of the most commonly-used operations. The challenging task in this operation is to extract sufficient critical features related to the targets from diverse backgrounds. Convolutional neural networks (CNNs) can be used to meet this challenge, which, however, often requires a large amount of computation resources.
In this thesis, a computation-efficient CNN architecture for object recognition is proposed. It aims at using the lowest computation volume to achieve a good processing quality. This is achieved by applying image filtering knowledge in the design of the CNN architecture. This work is composed of two parts, the design of a CNN module for feature extraction, and an end-to-end CNN architecture. In the module, in order to extract the maximum amount of high-density feature information from a given set of 2-D maps, successive depthwise convolutions are applied to the same group of data to produce feature elements of various filtering orders. Moreover, a particular pre-and-post-convolution data control method is used to optimize the successive convolutions. The pre-convolution data control is to organize the data to be convolved according to their nature. The post-convolution data control is to combine the critical feature elements of various filtering orders to enhance the quality of the convolved results. The CNN architecture is mainly composed of the cascaded modules. The hyper-parameters in the architecture can be adjusted easily so that each module is tuned to suit the signals in order to optimize the processing quality. The simulation results demonstrated that the architecture gives a better processing quality using a significantly lower computation volume, compared with existing CNNs of the similar kind. The results also confirm the computation efficiency of the proposed module, which enables more object recognition applications on embedded devices.
Divisions: | Concordia University > Gina Cody School of Engineering and Computer Science > Electrical and Computer Engineering |
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Item Type: | Thesis (Masters) |
Authors: | Ma, Yunlong |
Institution: | Concordia University |
Degree Name: | M.A. Sc. |
Program: | Electrical and Computer Engineering |
Date: | 18 March 2019 |
Thesis Supervisor(s): | Wang, Chunyan |
ID Code: | 985079 |
Deposited By: | Yunlong Ma |
Deposited On: | 17 Jun 2019 19:50 |
Last Modified: | 17 Jun 2019 19:50 |
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